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  • BIP Compiler

    The BIP compiler and execution engines for simulation, execution, exploration and debug of BIP models.


  • IF Toolset Intermediate Format and Verification Toolset

    The IF Intermediate Representation based on extending communicating timed automata has been defined for being able to offer a powerful toolset offering simulation, analysis and verification facilities for different modelling languages for distributed real-time systems.


The whole Verimag Tools page


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